Digital Clock Circuit Diagram Using 7490
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To make a digital counter which counts from 1 to 10, we need to have the counter count only the binary numbers 0000 to 1001. That is from 0 to 9 in decimal and fortunately for us, counting circuits are readily available as integrated circuits with one such circuit being the Asynchronous 74LS90 Decade Counter.
The counters four outputs are designated by the letter symbol Q with a numeric subscript equal to the binary weight of the corresponding bit in the BCD counter circuits code. So for example, QA, QB, QC and QD. The 74LS90 counting sequence is triggered on the negative going edge of the clock signal, that is when the clock signal CLK goes from logic 1 (HIGH) to logic 0 (LOW).
With the four flip-flops making up the divide-by-5 counter section disabled, if a clock signal is applied to input pin 14 (CLKA) and the output taken from pin 12 (QA), we can produce a standard divide-by-2 binary counter for use in frequency dividing circuits as shown.
If we want to display the count sequence using a seven-segment display, the BCD output needs to be decoded appropriately before it can be displayed. A digital circuit that can decode the four outputs of our 74LS90 BCD counter and light up the required segments of the display is called a Decoder.
Our circuit shows a simple 0 to 9 digital counter using a 74LS90 BCD Counter and a 74LS47 7-segment display driver. To count above 10 and produce a 2-digit base-ten counter and display, we would need to cascade two separate divide-by-ten counters together. A 2-digit BCD counter would count in decimal from 00 to 99 (0000 0000 to 1001 1001) and then reset back to 00. Note that although it will be a 2-digit counter, values representing Hexadecimal numbers from A through F are not valid in this code.
Digital clocks can be used to tell time at a glance. They became quickly more popular than the older sweep hand clocks, now known as analog clocks. The time derived by analog clocks came from either a pendulum or a spring. Pendulums are unusable on moving platforms, such as a ship, and springs unwind more and more slowly as they release stored up tension. The use of sweep hands allowed these mechanical time bases to be presented in a mechanically driven display. With the perfecting of multivibrator chips, electrical circuits could be built that could accurately keep time under a wide range of conditions. As the time base had switched from mechanical to electrical, the time display had to follow suit. Display devices called 7 segment displays were designed to allow the time to be shown numerically. While many digital clocks are available commercially, you can also build your own from components. Follow these tips to learn how to make a digital clock.
Here's how you can do it in the clock circuit: output of the OR gate is always zero except for the times the hours recieves a clock pulse, it goes 1 then back to 0(because of the reset mechansim).The NOT gate will make the output of the OR gate always 1 exept for the clock time it goes to 0 which exactly what we need for the monostable configuration.Of course we replaced the push-button with our signal from the NOT gate and the led for the speaker.Hope I helped
The counter / stop clock / stopwatch was the simplest module of the Digital clock. The counter was designed using Four bit BCD decimal counter (7490 TTL chip). The design of the counter included five 7490 chips, five 7448 BCD converters, five seven segment displays, two switches (one to clear/reset the counter, and another to stop/continue the stop clock), and one AND gate. Table below indicates the behavior of the Four bit BCD decimal counter.
The 7490 chip counts only when exactly two inputs are low while the other two can assume any values. For this design R0 inputs were used as reset inputs while R9 inputs were grounded. The figure below is a logic diagram of 7490 as found in TTL datasheets.
The 24 hour clock was designed using three pairs of Four bit BCD counters (7490) and Four bit divide-by-twelve counters (7492). The divide-by-twelve counters were used to provide the clock with the mod six operations. The circuit also made use of six BCD (7448) and six seven segment displays, including two OR and one AND gates. Circuit below shows how a pair of 7490 and 7492 chips was used to design a divide-by-sixty counter.
A pair of the above circuit was used to generate the minute and the hour hand. For the hour hand, extra logic had to be added to comply with the 24 hour format. The figure below shows the hour, minute, and seconds hands in HH:MM:SS format. Note that the clock is 24 hour clock and therefore goes from 00 to 23 for the hour hand.
The final design was to combine the three individual modules into one large module. Care had to be taken while moving and connecting the modules of the circuit as one misconnection would result into a time consuming debugging or even redesign of the final module. Before connecting the three modules to create the final design, each module was thoroughly tested to get rid of any bugs overseen during the initial design phase. The merging of the final circuit was done in two phases. Phase one involved merging the 24 hour clock and the date module. The combined module was tested too. But owing to the limitation of the simulation speed of logic works thorough tests were not performed. The second phase involved the merging of the counter/stop clock with circuit from phase two. This was tested too.
This simple digital timer circuit can be used to obtain timing output through selectable ranges, which can be set from 0 to 99 second, with 1 second interval, 0 to 990 seconds with 10 second interval, and 0 to 99 minutes with 1 minute interval. All these timing outputs can be visualized and tracked through a 2 digit common anode LED display.
This summer I took a course called \"Digital Electronics\" at my college. I learnt about flip-flops, counters and much more. So I thought it would great If I do a project related to digital electronics and from there the project digital clock started. The project took about 2 weeks to get completed. I started off with TTL IC's and made a block diagram shown below but there came the problem with this design as you can see in the block diagram it uses too many IC's making project very expensive and would have taken lots of power and battery would drain quite early. Using this design you requires at least 3 or 4 breadboards which assures you to consume a lot of space.
This instructable is for two purposes 1) to understand and learn the fundamentals of sequential logic 2) use that knowledge to create a digital clock. Digital clocks have been built by countless electronics hobbyists over the world. So why have I chosen to implement that Well usually clock circuits available on the internet (all circuits I have seen) use the 7490 counter (I have used 7493 but I will show why), microprocessors or Arduino boards. But not all of us have the means to buy microprocessors or Arduino boards (as far as I am concerned they are expensive). I wanted to try a different circuit for the same clock and I also chose it because it requires a lot of counters, and counters are based on sequential logic. When I say digital clock, you should expect something like the one in the picture!
It's my stand that just looking at the circuit diagram and replicating it on a bread-board is not what electronics is about. Almost all digital circuits from traffic lights etc. to even computers are all based on sequential logic (its importance). Therefore, I have included the theory of flip-flops and sequential logic design in hope that it would help the reader to design circuits of their own.
Since this is a circuit 'of my own', I know that I have to show a novelty factor. Usual clocks based on decade counters have a hour counter from 0 -23. I have only used IC's but still got a 12 hour clock, which I have not seen elsewhere. I have also added a small alarm module. The alarm is again achieved using IC's not by programming boards (which quite frankly is comparatively easy). It is not much but I did whatever extra nicks I could do. The main emphasis however, is learning sequential logic and developing a breadboard based clock using that knowledge.
As said earlier, our clock is a 12 hour clock. So, the clock we want is something like this HH : MM : SS A/P. Now, SS can also be referred as S1 S0 and the same goes for MM. S0 counts from 0 to 9 and then S1 becomes 1 and S0 counts again. Our seconds count is from 0 - 59. So our S1 counter has to count only from 0-5. S0 counts 0-9. Thus 0 - 59 will be obtained. Now when seconds becomes 60, it is one minute. So everytime SS reaches 60, M0 (minutes) should increase by 1.M1 and M0 essentially count the same way as seconds. So, a 1 second pulse given to S0 makes it count from 0 - 9. Whenever S0 reaches 10, a pulse (digital parlance - clock signal) has to be generated to make S0 zero again (digital parlance - reset) and S1 one and the process repeats to make S1 two and so on. Thus S1 S0 will count from 0 - 59. Everytime SS reaches 60 a pulse has to be generated to make M0 one and SS 00. For every 60 seconds, SS will go to 59 and back to 0, while MM is incremented. The MM counting is similar to SS but MM receives its clock (triggering pulse) from SS.Remember MM is also 0 - 59. So similar to how when, SS incremented MM when it turned 0 after 59 (it doesnt become 60), MM also should become 00 incrementing HH by 1. HH is a 1 - 12 counter. So when HH becomes 12, A (AM) is changed to P (PM) and vice-versa. So let's say the time is initially 11:59:59 A. The next second it will become, 12:00:00 P. The day passes and now the time is 11:59:59 P. The next second it will become 12:00:00 A. This repeats for as long as the clock runs.This is the logic of the circuit. So, we need to design a 0-9 counter for S0 & M0, 0-5 counter for S1 & M1 and 1 - 12 counter for HH. A/P doesn't need a counter, it just needs to alternate between these two states. The alarm is done using a magnitude comparator. A 8 pin dip switch is used to enter 8 bits of data. Note HH (1 - 12) is 4 bits and M1 (0 - 5) is 3 bits. A/P is 1 bit. So if ABCDEFGH are the 8 pins from left to right, ABCD is entered for hours, EFG is for minutes and H is for A/P (M).To set an alarm for 06: 30 AM, one needs to enter the binary value of 6 in ABCD (0110), 3 in EFG (011) and 1 (for A) in H. Note our alarm can be set only for 6: 30 or 6: 40 not any value in between. I think I can assume anybody who has enough technical knowledge to construct the clock will be able to enter the binary equivalent of decimals as shown above. When the clock data is equal to 8 pin dip switch data, the comparator's A=B truth value becomes logic high, which is used to trigger an alarm with another flip-flop. The reset of the flip-flop will enable us to silence the alarm. I guess that's as far as the logic in the circuit goes to. From now it's design and implementation. 59ce067264